Fig. 04 — Publications

Published Work

Eight peer-reviewed works on resistive memory, in-memory logic, crossbar arrays, and 2-D material transistors — written between IIT Ropar, the University of Michigan, and collaborations abroad.

67 Citations · h-index 3 · i10-index 2  — live metrics on Google Scholar

  1. 01

    RRAM · In-Memory Logic  First Author

    Performance Investigation of HfOx-Based 1-Transistor–1-Memristor Cell for In-Memory Logic Gates Implementation

    A. K. Gupta, M. S. Yadav, B. Rawat

    IEEE JETCAS · Jun 2026

    Investigates how a 1-transistor–1-memristor cell built on HfOx performs when logic gates are implemented directly inside memory — a step toward computing where the data already lives.

  2. 02

    RRAM · Neuromorphic

    Unveiling the Role of Nanoscale-Thick Thermal Enhancement Layers in Tuning Analog Switching and Synaptic Plasticity of Memristor

    M. S. Yadav, A. K. Gupta, B. Rawat

    ACS Applied Nano Materials 8(48) · Nov 2025

    Studies how nanoscale-thick thermal enhancement layers tune a memristor's analog switching behavior and synaptic plasticity — connecting device-level thermal engineering to neuromorphic function.

  3. 03

    RRAM · Crossbar  First Author

    Device-circuit co-design of memristor based on niobium oxide for large-scale crossbar memory

    A. K. Gupta, M. S. Yadav, B. Rawat

    Memories — Materials, Devices, Circuits and Systems, vol. 5 · 2023 · 3 Citations

    Co-designs a niobium-oxide memristor across the device and circuit levels so it can operate inside large-scale crossbar arrays, where device physics and array architecture cannot be treated separately.

  4. 04

    RRAM

    How Good Silicon Oxide-based Memristor Can be?

    M. S. Yadav, A. K. Gupta, K. Varshney, B. Rawat

    35th IEEE Int. Conf. on VLSI Design · 2022 · Regular Paper

    Assesses the realistic ceiling of silicon-oxide-based memristors — how far a CMOS-friendly oxide stack can be pushed as a resistive memory device.

  5. 05

    RRAM · Crossbar

    Design and modeling of niobium oxide–tantalum oxide based self-selective memristor for large-scale crossbar memory

    A. K. Parit, M. S. Yadav, A. K. Gupta, A. Mikhaylov, B. Rawat

    Chaos, Solitons & Fractals 145 · 2021 · 39 Citations — Most Cited

    Designs and models a self-selective memristor combining niobium oxide and tantalum oxide for large-scale crossbar memory, where selector-less cells are essential.

  6. 06

    2D FETs

    Performance projection of 2-D material-based CMOS inverters for sub-10-nm channel length

    A. Rawat, A. K. Gupta, B. Rawat

    IEEE Trans. Electron Devices 68(7) · 2021 · 25 Citations

    Projects how CMOS inverters built from 2-D materials behave at sub-10-nm channel lengths, benchmarking atomically thin channels as candidates for technology nodes beyond silicon.

  7. 07

    RRAM  Equal Contribution

    Role of Resistive Layer in Threshold Memory Switching Memristor Device

    A. K. Gupta*, M. S. Yadav*, B. Rawat  (*equal contribution)

    MEMRISYS 2021 · Tsukuba, Japan · Oral Presentation

    Examines how the resistive layer governs threshold switching in memory-switching memristor devices, informed by electro-thermal modeling of the switching stack.

  8. 08

    2D FETs

    Single and Multilayer Black Phosphorous-based CMOS Inverter for Deep Sub-10-nm Technology

    A. Rawat, A. K. Gupta, B. Rawat

    20th IWPSD · Kolkata · 2019 · Poster

    Explores single- and multilayer black-phosphorus CMOS inverters for deep sub-10-nm technology nodes — an early step into 2-D material device modeling.

Fig. 05 — Co-Authors

Collaboration

This body of work was built with Brajesh Rawat · M. S. Yadav · Akhilesh Rawat · Aditya K. Parit · Alexey Mikhaylov · Kanupriya Varshney.

Full records on Google Scholar  ·  ORCID